PDP-11 Interprocessor Link

This manual, dated October 1977, describes the DA11-B Interprocessor Link. The device allows for half-duplex, parallel, Direct Memory Access (DMA) data transfer between two PDP-11 computers.

Key sections include: - Introduction & Operation: Explains the basic mechanism using Command and Status, Word Count, Bus Address, and Data Buffer registers, utilizing Non-Processor Requests (NPR/DMA). - Installation: Details cabling requirements using BC08R cables and physical setup within BA11 mounting boxes. - Programming: Describes the registers (DRST, DRWC, DRBA, DRDB) and modes (Word vs. Block) for managing data flow between processors. - Theory of Operation: Outlines the cross-interrupt connection and how NPR cycles are interlocked between the two Unibuses. - Maintenance: Lists required diagnostics (MAINDEC-11-DZDRB) and suggested spare modules. - Appendices: Provides instructions for altering priority interrupt levels and adjusting the interprocessor transfer rate.