HSC50/70

This document provides technical information on the HSC50 and HSC70 mass storage servers. It covers:

• Hardware Architecture: Block diagram descriptions of the HSC50 and HSC70 components, including the Input/Output Control Processor (P.ioc/P.ioj), Memory Modules, and Data Channel Modules.
• Bus Specifications: Detailed timing and protocols for the Program Bus, Control Bus, and Data Bus, including differences between HSC50 and HSC70 implementations.
• Host Interface: A technical breakdown of the K.ci host interface modules, including the Port Link Module (LINK), Port Buffer Module (PILA), and Port Processor Module (K.pli), covering data packet formats and link operating states.
• Power System: Detailed descriptions of AC power controllers, power supplies, airflow sensors, and protection circuits for both the HSC50 and HSC70 models.

The manual is intended for support-level field service representatives and assumes existing knowledge of Digital Storage Architecture (DSA) and related protocols.