KD11-A Processor

This maintenance manual details the design, architecture, and operation of the KD11-A processor, a key component of the PDP-11/35 and PDP-11/40 computer systems. The document covers:

• Microprogramming: Explanation of the processor's microprogrammed control unit and read-only memory (ROM) structure.
• Block Diagrams: Descriptions of the interface, data paths, and microcontrol logic.
• Flow Diagrams: Guides on interpreting microprogram flow diagrams, including branch microprogram tests (BUT).
• Logic Diagrams: Detailed technical breakdowns of processor modules (M7231-M7235).
• Console and Options: Information on the KY11-D programmer's console and optional hardware like the KJ11-A Stack Limit Register and KW11-L Line Frequency Clock.