21064-AA Microprocessor

This document provides a technical overview of the Digital 21064-AA microprocessor, the inaugural chip implementing the 64-bit Alpha RISC architecture. It details the chip's features, including its .75 micron CMOS process, 150 MHz cycle time, dual-instruction issue, and on-chip caches. The document covers the microarchitecture, dividing the chip into Ebox, Fbox, Abox, and Ibox units, and explains the pipeline organization and external cache support. Additionally, it highlights key advantages over conventional RISC architectures, such as byte manipulation and multiprocessor support, while providing technical specifications, signal definitions, and packaging information.