PDP-11/45 Processor Handbook

This document is the official Processor Handbook for the Digital Equipment Corporation PDP-11/45 computer system. It is divided into eight chapters and five appendixes, covering the following key areas:

• System Architecture: Detailed information on the 16-bit processor, UNIBUS, memory management, and multi-programming capabilities.
• Addressing Modes: Comprehensive guide to the PDP-11's addressing capabilities, including direct, deferred, stack, and PC-based modes.
• Instruction Set: A detailed breakdown of the PDP-11/45 instruction set, including single operand, double operand, and program control instructions.
• Advanced Programming: Techniques for stack manipulation, subroutine linkage, interrupts, reentrancy, and position-independent code.
• Memory Management: Detailed explanation of virtual addressing, memory protection, and register mapping for the 18-bit address space.
• Floating Point Processor: Architecture and instruction set for the optional floating-point unit.
• System Operator's Console: Operational instructions for the console switches and indicators.

The document also includes extensive appendixes on the Instruction Set Processor (ISP) notation, instruction timing charts, a memory map of reserved locations, and programming interrupt requests.