Microserver Sync Logic Schematics

Logic

Order Number: TBD00-0-0

This document contains a comprehensive set of logic schematics for the Microserver-S system, dating from 1986. The contents include signal synonyms for the UVax control, DAL, and I/O buses, organized by module of origin and function. It also details specific system components, including the processor, UVRAM, I/O memory, Ethernet interface, DMA, serial assist logic, and power distribution systems, providing a complete structural blueprint of the server's underlying hardware architecture.

TBD00-0-0
December 1985
55 pages
Quality

Original
28MB

Site structure and layout ©2026 Majenko Technologies