Principles of Operation

This document, Chapter 3 of the PDP-8/E technical documentation, provides a comprehensive overview of the processor's functional operation. It details the eight functional areas of the PDP-8/E, the OMNIBUS concept, timing generation (M8330), memory systems (MM8-E), major register control (M8310), and major registers (M8300). The text includes system flow diagrams, start-up/stop procedures, and detailed descriptions of major states such as FETCH, DEFER, EXECUTE, and Direct Memory Access (DMA). It also provides logic references for signal interaction and specific operate microinstruction groupings (Groups 1, 2, and 3).