FPP Assembler

This document describes the FPP Assembler, which is designed for the PDP-12 Floating Point Processor (FPP-12). It outlines the assembler's function in translating PDP-8 and floating point mnemonic operation codes into binary code through a two-pass process. The guide covers hardware requirements, statement syntax, expression formats (integer, double precision, and floating point), the use of arithmetic and logical operators, instruction formats, and the application of literals and pseudo-operations. Additionally, it details how to use the assembler, exit procedures, provides an example program, and includes appendices with error messages, symbol count calculations, summaries of character sets, operators, pseudo-operations, FPP symbols, and system flow charts.