BE Adder Tests

This document, identified as MAINDEC-08-D0CC-0, outlines the diagnostic testing procedure for the PDP-8 adder circuits. The program is divided into five parts:

• Adder circuit tests.
• TAD instruction simulation tests.
• Rotate instruction simulation tests (RAL, RAR, RTL, RTR, BSW).
• Carry generation tests.
• Field relocation adder tests.

The document details the storage requirements (locations 0000-6000 and 7775-7777), loading procedures, and various control switch settings to configure test behavior, such as looping on errors, fast tests, or relocating to different memory banks. It also explains error message handling for the simulated addition, rotate, carry, and random number tests.