PDP-8/E and PDP-8/M

This document provides an introduction to the Digital Equipment Corporation (DEC) PDP-8/E and PDP-8/M computer systems. It details the system architecture, which is centered around the common 'OMNIBUS' bus, and covers the primary components including the central processor, core memory, and various peripheral interfaces. It specifically describes the major internal registers (AC, MQ, PC, CPMA, and MB), register controls, timing generator, and bus load modules. Additionally, it outlines the three major processor states (FETCH, DEFER, and EXECUTE) used for instruction execution and provides configuration information for both the table-top and rack-mountable versions of these 12-bit processors.