KK8-F

This document is a field maintenance print set for the KK8-F Central Processor, which is designed for use in the PDP-8E computer system. It includes:

• Table of Contents: Lists the engineering documentation, including schematics for the central processor (KK8-F), major registers (M8300), major register control (M8310), bus loads (M8320), and the timing generator (M8330).
• Engineering Specifications: Provides an overview of the KK8-F 12-bit central processor, defining the basic system, optional components (such as the KE8-E Extended Arithmetic Unit), mechanical packaging (Omnibus-based quad boards), environmental requirements, and power specifications.
• Drawings and Schematics: Contains detailed logic diagrams and assembly-level information for the various modules that comprise the KK8-F processor, including signal pinouts and module interconnects.