Memory Extension Control

This document provides a comprehensive collection of engineering schematics for the MC81 Memory Extension Control system. The content includes:

• Detailed logic diagrams for Memory Extension Control (Sheets 1 and 2).
• Schematics for inhibit drivers (MC81-B and MM8I-A).
• X and Y axis selection circuitry for various fields.
• Memory Control schematics for the MM8I-A.
• Sense amplifier and inhibit driver schematics.
• Memory Parity Option schematics (Sheets 1 and 2).
• Display Control and Plotter Control logic.
• Real Time Clock options and associated M708/M709 control logic.
• Flow diagrams for major states and operations.
• Major Register gating logic (Sheets 1-4).
• I/O Level Converter schematics.
• Teletype Receiver and Transmitter control schematics.