The 82346 System Controller is a highly configurable component designed for systems running up to 33 MHz. It manages DRAM memory control, system board refresh, and bus timing. The device supports page mode operation, interleaving, and programmable memory timing to maximize performance with low-cost DRAM. Key features include full EEMS support for the LIM EMS 4.0 standard, shadowing for ROM and EMS, and flexible AT bus clocking. The document provides detailed signal descriptions, pin diagrams, and block diagrams for integration with CPU and bus controllers.
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