82385 High Performance 32-Bit Cache Controller

This document is the Advance Information datasheet for the Intel 82385 High Performance 32-Bit Cache Controller. It covers the functional overview, architecture, bus structure, master/slave operations, cache coherency via bus watching, and interface specifications for the 82385 in a 386 DX-based system. The document includes detailed pin descriptions, configuration settings (master vs slave modes), cache organization (direct mapped vs 2-way set associative), A.C. and D.C. electrical specifications, timing diagrams for various bus cycles, and system testing considerations.