Compiler Writer's Guide

The 21264/21364 Compiler Writer's Guide is a reference document designed to assist compiler developers and assembly programmers in optimizing code for Alpha 21264 and 21364 microprocessors. The guide covers:

• Architecture Overview: Introduction to the 64-bit RISC architecture, data types, and supported formats.
• Hardware Features: Detailed explanations of processor components, including register rename maps, the integer execution unit (Ebox), the floating-point execution unit (Fbox), and the 7-stage pipeline organization.
• Instruction Management: Rules for instruction issue, slotting, and retirement, including latency information for various instruction classes.
• Optimization Guidelines: Practical advice on instruction and data alignment, branch prediction strategies, branch elimination techniques, and SIMD parallelism.
• Performance Tuning: Strategies for effective prefetching and avoiding replay traps, which can occur due to memory contention.
• Technical Appendices: Provides detailed summaries of upper-lower rules, checksum loop scheduling examples, and IEEE floating-point conformance details.