Digital Technical Journal

This journal issue provides an in-depth technical examination of Digital Equipment Corporation's CVAX-based systems, specifically the VAX 6200 family and the MicroVAX 3500/3600 systems. The document covers:

• System Overviews and Architecture: Architectural definitions, bus protocols (XMI, VAXBI), and multiprocessing techniques.
• Design and Verification: CAE/DVT processes used to ensure first-pass functional design.
• Performance Evaluation: Workload development and performance analysis under real-world usage scenarios.
• VMS Operating System: Symmetric multiprocessing (SMP) enhancements in VMS version 5.0, including spinlocks and process affinity.
• Chip Set Details: Design of the CVAX 78034 CPU, CVAX Floating Point Chip (CFPA), System Support Chip (SSC), CVAX Q22-bus Interface Chip (CQBIC), and the CVAX CMCTL memory controller chip.