The Stanford University Design System (SUDS) is a comprehensive schematics and logic drawing package developed at the Stanford Artificial Intelligence Lab. It acts as a central database for automated printed circuit board (P.C. board) design systems at Digital.
Key features include: - Interactive graphics for drawing schematics and logic diagrams. - Automated generation of wirelists and layout data for systems like CALDEC, IDEA, and SAGE 2. - Extensive library support for components. - Facilities for logic simulation, placement optimization, and delay calculation. - Integration with other CAD processes to reduce design time and human error by eliminating manual wirelist coding.
The system runs on DECsystem-10 and DECsystem-20 environments using programmable graphics terminals, and it is intended to streamline the entire module design process from initial sketch to final production.
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