This document provides technical information on the DECchip 21071 and DECchip 21072 core logic chipsets, which are designed to support the Alpha 21064 microprocessor family in uniprocessor systems.
Key features include: * Chipset Components: The 21071 and 21072 chipsets consist of three unique gate arrays: the 21071-CA (cache/memory controller), the 21071-DA (PCI interface), and the 21071-BA (data path). * Performance: Supports system clock frequencies up to 33 MHz, providing high-bandwidth CPU and DMA operations. * Memory & Cache: Features a write-back secondary cache (Bcache) controller and a programmable DRAM/SIMM memory controller supporting 8 MB to 4 GB of main memory, with optional 32-bit parity or ECC. * PCI Interface: Integrated high-performance PCI bridge providing industry-standard connectivity with support for scatter/gather mapping. * Graphics Support: Direct connection capability to VRAM frame buffers.
The manual details pin descriptions, architecture, register programming, electrical specifications, and power-up/initialization sequences for each of the core chipset components.
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