DECchip 21171 Core Logic Chipset

Technical Reference Manual

Order Number: EC-QE18B-TE

This document provides a comprehensive technical reference for the DECchip 21171 core logic chipset, which is designed to support the Alpha 21164 microprocessor in high-performance uniprocessor systems.

The manual is organized into two parts:

  • Part I: DECchip 21171-CA (CIA) Information: Covers the Control, I/O interface, and Address (CIA) chip, including pin descriptions, detailed architecture, control and status registers (CSRs), power-up/initialization, and system address mapping.
  • Part II: DECchip 21171-BA (DSW) Information: Details the Data Switch (DSW) chip, providing pin descriptions and an architectural overview.

The chipset facilitates a 64-bit PCI bus interface, 256-bit ECC-protected memory paths, and support for up to 8GB of physical memory. It includes detailed register maps, timing specifications, and configuration details for memory and PCI address windows.

EC-QE18B-TE
September 1995
238 pages
Quality

Original
0.6MB

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