This document from 1961 details two core memory expansion methods for the PDP-1 computer: the Type 11 system, which supports up to 16,384 words, and the Type 14 system, which supports up to 32,768 words. It explains the register-based switching mechanisms, instructions like jump field (jfd) and change data field (cfd), and handling of high-speed channel transfers and sequence break interrupts for each system. Additionally, an appendix provides programming examples for matrix addition to demonstrate the implementation of memory field switching.
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