Port Hardware Description

This document provides a technical overview of the KC10 input/output architecture, focusing on the functionality of the Port Processor and Port Data Mover modules.

Key features described include: - Port Processor Module: Functions as a specialized computer to control I/O, utilizing a microcode-controlled architecture with 1K x 36 bits of memory and interface capabilities for the I/O bus and PLI (Peripheral Link Interface). - Port Data Mover Module: Acts as a slave to the port processor to manage high-speed data transfers between port adapters and system memory without CPU intervention. It supports multiple data packing modes, including core dump, high density, industry compatible, and 7-bit ASCII. - Operational Details: Includes block diagrams, microword field definitions, RAMFILE management, and memory read/write operational logic for both modules.