A DOCUMENT ON THE KI10

This document provides a technical overview of the KI10 processor, which was used in DEC's 1060, 1070, and 1077 computer configurations. It details the hardware features, including virtual memory capabilities, paging mechanisms, and processor modes.

The summary covers the following key areas:

• Paging and Memory Management: The KI10 implements demand paging, where a program's active "working set" of pages resides in core memory, while the remainder resides on virtual memory devices (disk or drum). It uses an "associative memory" (paging box) to translate virtual addresses to physical locations.
• Processor Modes: The KI10 operates in four distinct modes: Kernel and Supervisor (Executive modes), and Concealed and Public (User modes), each with varying levels of privilege, protection, and access rights to memory and instructions.
• Instruction Set Differences: The document outlines key differences from the earlier KA10 processor, specifically highlighting new capabilities in stack handling, byte manipulation, fixed-to-floating point conversions, and double-precision arithmetic. It also details the "Executive Mode XCT" instruction, which allows the monitor to access user address spaces and register blocks transparently.
• Monitor Usage and Interrupts: It describes how the monitor manages page maps, memory referencing for non-current users, and how the KI10's priority interrupt system handles "smart" devices.
• Console Notes: The final section provides a guide to the physical lights, switches, and console functions, noting differences in operation compared to the KA10 console.