Functional Specification for Dolphin Arithmetic Processing Accelerator

This document, dated October 1978, provides the functional specification for the DOLPHIN Arithmetic Processing Accelerator (APA). The APA is designed to enhance the performance of the DOLPHIN system by accelerating single and double precision floating point operations, integer arithmetic, and various FORTRAN built-in functions. The specification covers the following key areas:

• Overall Description: Defines the set of opcodes handled by the APA and the design goals for accuracy and performance.
• System Connections: Describes how the APA interfaces with the IBOX, EBOX, and MBOX to execute instructions, fetch operands, and store results while maintaining correct operation order.
• Internal Architecture: Details the seven key functional blocks of the APA, including its datapath, shifter, AC copies for fast access, and micro-controller.
• Performance: Highlights the expected speed improvements in key floating-point operations (DFMP, DFDV, DFAD) to improve performance in compute-bound FORTRAN applications.