Shared Pages Data Integrity Box Specification

This document outlines the design and functionality of the optional Shared Pages Data Integrity (SPDI) Box for Dolphin bus systems. The SPDI Box ensures data integrity across multi-processor system caches by preventing stale data. It monitors memory bus requests, particularly 'write' requests to shared writable pages, and manages 'cache zapper' signals to ensure all processors update their caches correctly. It also handles interlock read requests to prevent race conditions. The memo includes technical details, cost estimations involving Macro Cell Arrays (MCAs), and considerations for multiprocessor configuration.