This manual, first published in May 1985, serves as a comprehensive technical guide for the Digital Equipment Corporation PDP-11/84-A series computer. It details the system architecture, including the J11 microprocessor with floating point accelerator and the Private Memory Interconnect (PMI).
Key contents include: * System Overview: Description of system components, including the KDJ11-BF CPU, memory modules (MSV11-JB/JC), and UNIBUS adapter (KTJ11-B). * Installation: Detailed site preparation and physical installation procedures for both the 42-inch cabinet and the 10.5-inch rackmountable box. * Functional Description: In-depth technical explanation of the PMI bus, memory management, cache operations, and bus signal definitions. * Bootstrap and ROM: Programming information for the boot and diagnostic ROMs and EEPROM, including setup mode commands. * System Maintenance: Troubleshooting aids, diagnostic error code tables, and step-by-step procedures for replacing field-replaceable units (FRUs). * Appendices: Technical reference materials including CPU instruction timing, hardware/software differences, and backplane pin assignments.
| MSV11-J MOS Memory User's Guide | EK-MSV1J-UG |
| MSV11-J MOS Memory User's Guide | EK-MSV1J-UG |
Site structure and layout ©2026 Majenko Technologies