KL10 ICCS Port Design

This document outlines the technical design for a KL10 ICCS port that provides a VAX-compatible interface to the ICCS bus. It serves as a working paper rather than a formal specification. Key sections cover:

• Interfaces: Software-to-port control, port-to-link, and port-to-memory interfaces (DMA and E-BUS).
• Initialization: The monitor initializes port operations using a specific port control block (PCB) structure.
• Command Queues: Defines four command queues with distinct priorities for handling host and remote requests.
• Data Handling: Procedures for messages, buffer descriptors (BD), and buffer descriptor tables (BDT), including modifications required for TOPS20 compatibility.
• I/O and CSRs: Details on Control and Status Registers (CSRs) and I/O instructions for port operation.
• Programming Considerations: Technical constraints regarding physical memory addressing and performance optimization, such as caching port data.