This document outlines the functional requirements and architecture for the PHYKLP driver, which is the lowest level of software support for the CI-20 within the TOPS-20 operating system. The document covers the KLIPA microcode interface, global data structures (Channel Data Block, Port Control Block, and System Block), the PHYSIO interface, and the SCAMPI interface. It also details error processing, diagnostic routines, and key algorithms for initialization, polling, and interrupt service.
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