Overview

The PHYKLP driver acts as the low-level support for the KLIPA device, facilitating communication within the CI (Computer Interconnect) environment and integrating with the PHYSIO system. This document serves as a 'road map' for implementers, detailing the driver's structure, functions, and interfaces.

Key Components

• Port Control Block (PCB): The communication area between the KLIPA and the driver, storing interlock words and queue headers.
• System Blocks: Data structures describing nodes on the CI and the state of virtual circuits.
• Driver Pieces:
  • Poller: Monitors CI nodes and reports failures.
  • Interrupt Service: Handles device interrupts and virtual circuit initialization.
  • Message/Datagram Transmission: Interfaces for SCA (Systems Communication Architecture).
  • DMA Services: Manages CI buffers.
  • Diagnostic Services: Supports KLIPA-specific functions.

Operation

PHYKLP operates as a state machine. It manages virtual circuit initialization via a three-way handshake protocol and handles data transmission based on the current circuit state. It provides interfaces to both the PHYSIO system and SCA, while maintaining physical addresses for the KLIPA's direct access.