KT11-B Paging Option

This document details the KT11-B Paging Option, which provides address mapping, memory protection, and relocation for PDP-11 systems to support multi-user timesharing. It covers the following sections:

• Introduction: General description of address mapping and the interface between the processor and the Unibus.
• Installation: Physical site considerations, cabling requirements, and initial setup procedures.
• Operation and Programming: Describes internal registers (including Page Status Control and Map Control registers), diagnostic software, and input/output coding.
• Principles of Operation: Explains the associative memory, scratchpad, replacement counter, and the paging process including residency, privacy, and write violation handling.
• Maintenance: Describes special test equipment (maintenance board) and troubleshooting techniques.