KD11-A

This document serves as the primary technical reference for the KD11-A processor, a fundamental component of the PDP-11/40 computer system. It details the processor's architecture, including its microprogrammed control unit, block diagram, and logic modules. Key sections include:

• Microprogramming: Explains the techniques for implementing the instruction set using Read-Only Memory (ROM).
• Block Diagram Description: Breaks down the processor into functional units: interface, data paths, and control logic.
• Logic Diagrams: Provides detailed descriptions of modules such as the M7231 (Data Paths), M7232 (U-Word/Control ROM), and M7233 (IR Decode).
• Programmer's Console: Describes the KY11-D console for monitoring and manual operation.
• Options: Covers internal options like the KJ11-A Stack Limit Register and KW11-L Line Frequency Clock.

The manual is structured to guide the user from an architectural overview to the detailed logic level necessary for maintenance and troubleshooting.