PDP-11/45

This manual provides comprehensive maintenance and reference information for the PDP-11/45 system. It covers a wide range of topics, including:

• CP Instruction Set: A detailed breakdown of instructions, addressing modes, and operator definitions.
• Memory Management: Information on memory management, including KT11 memory management, semiconductor and core memory configurations, and memory parity control.
• Floating Point: In-depth documentation of the floating-point processor, including instruction formats, exception handling, and data types.
• Architecture & Internals: Block diagrams and register definitions for the processor, as well as details on memory address decoding and module configurations.
• System Operation: Includes information on the operator's console, bootstrap loaders, and interrupt/trap vectors.

The document also contains technical appendices including device register addresses and an ASCII character code table.