PDP-11 Architecture Handbook

Overview

The PDP-11 Architecture Handbook (1983-84) serves as a technical guide to the architecture of Digital Equipment Corporation's (DIGITAL) PDP-11 computer family. It is intended for both experienced PDP-11 users seeking technical specifics and those new to the platform needing a tutorial-style introduction.

Key Content

• Family Architecture: Explains the fundamental elements of the PDP-11, including instruction sets, addressing techniques, registers, and interrupt structures.
• Evolution: Documents the history of the PDP-11 and LSI-11 lines, detailing milestones from the original UNIBUS systems in 1970 to the MICRO/J-11 chipsets.
• Data Representation: Details various data formats, including integer (8-bit bytes/16-bit words), character string data, decimal string data (numeric and packed), and floating-point formats.
• Addressing Modes: A comprehensive guide to PDP-11 addressing modes, including register, autoincrement/decrement, index, and PC-relative modes.
• Instruction Sets: A detailed reference for the basic PDP-11 instruction set, including categories such as single-operand, double-operand, branch, jump/subroutine, and condition code operations.
• Floating-Point & Commercial Extensions: Coverage of the FP-11 floating-point processor instructions and the Commercial Instruction Set (CIS).
• Mapping & Bus Structures: Explains memory management, virtual addressing, physical address construction, and technical specifications for the UNIBUS and LSI-11 Bus, including arbitration and timing.
• Appendices: Includes extensive reference material, such as device address/vector assignments and a detailed 'Family Differences Table' comparing various PDP-11 processor implementations.