PDP-11/34

This document is the official processor handbook for the Digital Equipment Corporation PDP-11/34 computer. It provides comprehensive technical information including:

• System Architecture: Detailed coverage of the UNIBUS, central processor, memory organization, and automatic priority interrupts.
• Addressing Modes: In-depth explanations of single and double operand addressing, direct addressing modes, and deferred (indirect) addressing.
• Instruction Set: A complete reference for single operand instructions, double operand instructions, and program control/branching instructions, including opcodes and execution timing.
• Memory Management: Description of the memory management unit, relocation, protection, and status registers (SR0, SR2).
• Programming Techniques: Best practices for using stacks, subroutine linkages, reentrancy, and position-independent code (PIC).
• Hardware Details: Specifications and backplane configuration for the PDP-11/34.