Processor Organization

This student workbook, part of a Digital Equipment Corporation training series, provides a comprehensive introduction to the internal organization of the PDP-11 processor. It covers the three main functional elements—Unibus control, general-purpose registers, and data manipulation logic—and details how information flows through the system. The document explains the steps of the instruction cycle (fetch, obtain operand, execute, and service interrupts/traps) and describes the role of Read-Only Memory (ROM) in controlling these states. Furthermore, it provides detailed information on register usage, stack pointer operations during interrupts, the Processor Status Word (PSW), and specific configurations for larger PDP-11 processors like the 11/45 and 11/70. The workbook includes a self-scoring test to verify understanding of the material.