PDP-11 Instruction Set

Preliminary Specification

January 24, 1969

Order Number: PM 21-19

This document is a 1969 confidential preliminary specification for the PDP-11, a 16-bit small computer. It provides detailed technical information on the processor hardware architecture, including:

  • Processor Registers: Description of the eight 16-bit hardware registers (Program Counter, Status Register, Accumulator, X-Register, Y-Register, and 'mini' registers).
  • Memory Addressing: Details on various addressing modes, including relative, Page 0, full, immediate, 'mini', external, X-indexed, and Y-indexed addressing.
  • Instruction Groups: Comprehensive breakdowns of machine instructions categorized into groups: Memory Reference (e.g., load, store, add, compare, and, jump), Operate, Conditional Jump, Add to Register, and External (input/output/control).
PM 21-19
January 2000
10 pages
Quality

Original
0.9MB

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