Register Layout for 11/40 and Up

This technical memorandum (No. 14, dated July 14, 1970) addresses the requirement for additional general-purpose registers in the PDP-11 family as it evolved to support 32-bit integer and floating-point arithmetic. The author evaluates four potential schemes for extending register capacity while maintaining compatibility with the existing PDP-11/20 architecture:

• Variable Length Scheme: Extends register length but does not increase the number of registers.
• Completely Overlapping Scheme: Adds new registers that overlap with existing ones, simplifying saving/restoring but complicating CONVERT instructions.
• Partially Overlapping Scheme: Offers a compromise by providing additional non-overlapping registers and resolving CONVERT instruction issues, though it adds hardware complexity for internal addressing.
• Disjoint Scheme: Provides distinct registers without overlap, which is the preferred approach due to its advantages and lack of significant implementation constraints.

The document concludes that the Disjoint Scheme is the most suitable for implementation for future PDP-11 models, such as the 11/40.