The Repeat Instruction

This technical memorandum explores the implementation of a conditional repeat instruction to allow for single-instruction loops in the PDP-11/40 architecture. The author, Ad van de Goor, discusses key design challenges, including:

• Implementation Methods: Evaluating two approaches: a special register for repeat counts versus using an Effective Address (EA) to specify the count.
• Repeat Conditions: Suggesting the reuse of existing PDP-11 branch conditions.
• Stop Reasons and Handling: Examining two ways to signal stop reasons to the programmer—a "skip method" and a "condition code method"—and detailing how they affect machine state and instruction execution.
• Instruction Handling: Proposing that for performance, instructions should be fetched once for the duration of the loop unless interrupted.

The memo aims to guide the development of a cost-effective, space-efficient repeat instruction compatible with the existing PDP-11 family architecture.