This document is a technical manual for the MM11-F, a 4096-word (4K) 16-bit random-access read/write core memory designed for the PDP-11 computer system. It details the theory of operation, including core array configuration, address selection, and memory cycles (DATI, DATIP, DATO, and DATOB). The manual also provides comprehensive maintenance procedures, including adjustment instructions for voltage reference (V REF), voltage slice (V SLICE), and strobe delay, as well as an overview of diagnostic programming tests.
| Memory Levels and Gates | G103-0-1 |
| Memory Levels Gates | G103-0-1 |
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