11-Family Programming Information

This document outlines the programming architecture for the RL11, RLV11, and RLV12 storage controllers. It covers the general operation of these controllers, specifically detailing the function of addressable registers including the Control Status Register (CSR), Bus Address Register (BA), Multipurpose Register (MP), and Disk Address Register (DA).

Key sections include: - Controller Descriptions: Overview of module design and buffer operations for RL11, RLV11, and RLV12. - Addressable Registers: Detailed bit-level definitions for all controller registers. - Controller Commands: Descriptions of the eight commands, including No-Op, Write Check, Get Status, Seek, Read Header, Read Data, and Write Data. - Error Handling: Definitions of error codes, operational considerations for seek and data transfer, and recommended recovery procedures for various hardware faults. - Differences and Considerations: Comparison to previous subsystems like the RK05 and explanation of specific functional behaviors.