The M182 module consists of two independent high-speed parity circuits designed to analyze binary data inputs. The module detects whether the presented data contains an odd or even number of 1s.
Key Specifications:
Function: Parity detection (odd/even).
Inputs: Each input represents 5 unit loads; requires both data and its complement.
Outputs: L1/V2 can drive up to 12.5 unit loads; K1/U2 can drive up to 7.5 unit loads.