This document contains the engineering schematic for the Parity Circuit (MI62) developed by Digital Equipment Corporation. The circuit utilizes various logic gates, specifically the DEC7420N and DEC7430N integrated circuits, to perform parity logic operations. The schematic includes component pinout details, capacitor specifications, and input/output signal designations (E1-J1 and P2-T2). It is intended for test and maintenance purposes.
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