Detailed Model Specifications

This document, a 1967 technical memorandum from Digital Equipment Corporation, outlines the proposed models, expandability, and compatibility of the PDP-X computer system. It describes two primary classes of systems:

• Model I: The entry-level model, which lacks hardware general registers (using memory-based program counters and accumulators) and runs a basic instruction set. It is designed for low-cost performance, supporting 4K to 32K of memory.
• Model II: The mid-range model, which includes two sets of hardware general registers and an extended instruction set. The Model II is modular and allows for several hardware expansions, including:
  • Priority Interrupt System: Adds six sets of general registers and advanced interrupt handling.
  • Protection Option: Adds user/executive modes and a memory paging system.
  • Hardware Enhancements: Includes options for power fail detection, memory parity, machine check, and memory expansion up to 128K.

The document includes a summary table (page 4) detailing the specific configurations, add/multiply times, and interrupt structures for various iterations of the Model I (Ia, Ib) and Model II (IIa, IIb, IIc).