Digital PDFs
Documents
Guest
Register
Log In
/
Hardware
Computers
PDP
PDP-X
Title
Volume
Order No
Parent
Additions to PDP-X Instruction Simulator
XX-D9231-1C
Control Memory Format (Preliminary)
XX-D669E-15
Detailed Model Specifications
XX-51808-D1
IO Bus Sequences
XX-5D580-C7
Magtape IO Processor Interfaces
XX-C3EE3-87
Memorandum Distribution List
XX-F11AC-96
Memory Bus Description
XX-F047B-2E
Parity Control in the Magtape IO Processor
XX-270EC-1F
PDP-X Documentation
Technical Memoranda
This document provides an index of technical memoranda regarding the PDP-X project as of November 1967.
1967-11-08-MEM
PDP-X Processor Description
Technical Memorandum #29
This document provides a technical description and architectural specifications for the PDP-X computer family.
29
PDP-X/II Programmers Console
XX-2B0B8-9D
Introduction to PDP-X Technical Memorandum
1
XX-9315F-E8
Memorandum Distribution List
2
XX-E8639-47
PDP-X Design Goals
3
XX-3794D-5F
PDP-X Design Decisions
4
XX-A53D5-68
Specifications
5
XX-D1498-DA
PDP-X System Architecture
6
XX-E0DE6-49
Light Duty Card Reader
7
XX-6EB1D-D6
Small XY Display
8
XX-20CA9-B2
Bus to Bus Adapter
9
XX-BA6E3-DB
Progress 7-17-67 (Architecture)
10
XX-A2C3A-45
PDP-X Technical Memorandum #11
DECtape tape format
11
XX-B6A97-34
PDP-X Processor Description
13
XX-6E73B-EF
PDP-X Technical Memorandum #15
15
XX-413E5-E0
PDP-X System Architecture (Revised)
16
XX-D882C-6B
Comments on lack of HALT instruction
17
XX-A965E-7B
PDP-X Instruction Simulator
18
XX-F6884-07
PDP-X Diagnostic Goals
19
XX-151DB-79
Memorandum Index Program
20
XX-FC1EA-34
Processor/Memory Timing Relations
21
XX-0FD35-D9
PDP-X/II Register Section (Proposed)
24
XX-D5856-FC
Marketing Suggestions for First Implementations
27
XX-D3E81-10
EOP Class Instructions
32
PX-TCMEM-32
PDP-X Assembler Specifications
43
XX-3A546-59
34 documents
Home
Privacy and Data
Site structure and layout ©2026 Majenko Technologies