Control Memory Format (Preliminary)

This document is a technical memorandum from November 1967 detailing the Read-Only Memory (ROM) control structure for the PDP-X Model II processor. It describes the design philosophy of using a microprogram stored in ROM to control various processor sections (arithmetic, I/O, etc.), thereby achieving commonality across different processor types while allowing specialized functionality.

The document provides a comprehensive breakdown of the ROM word structure, which consists of 34 control fields that define the micro-orders governing CPU states, branch conditions, and memory operations. Key technical sections cover:

• Microprogram Sequencing: Explains how micro-instructions determine the next instruction address, including the use of branch tests and microprogram traps for error handling.
• Control Field Definitions: Details specific control groups and fields, such as Memory Control, Result Bus, Data Control, and Miscellaneous Control, specifying the number of bits and the functional description for each.
• Appendices: Provides supplemental technical information on the logic used for Fast Memory Addressing and Control Memory Addressing (branching mechanics).