KA11 Processor Manual

Order Number: DEC-11-HR2B-D

This document provides a comprehensive technical overview of the KA11 processor, a fundamental component of the PDP-11 (PDP-11) system. The manual covers four primary areas:

  • Processor Structure and Data Flow: Detailed through block diagrams illustrating the Bus Interface, Data Paths, Registers, and Control section.
  • Instruction Set: Defined using Instruction Set Processor (ISP) notation, describing data manipulation and transfer operations.
  • Machine State Flow: Describes the timing and state sequences (Fetch, Source, Destination, Execute, Service) that control processor operations, supplemented by flow charts.
  • Logic and Maintenance: Provides module-by-module logic descriptions, timing explanations, and procedures for installation, maintenance, and diagnostic testing.

It is intended for users needing a deep understanding of the KA11's internal operation for troubleshooting and system maintenance.

DEC-11-HR2B-D
May 1972
91 pages
Quality

Original
6.8MB

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