KB11-A Central Processor Unit

This maintenance manual provides technical details for the KB11-A Central Processor Unit, which serves as the core of the PDP-11/45 system. The document includes:

• General Description: Overview of system components including the processor, MS11 memory, FP11 floating-point unit, and KT11-C memory management.
• Instruction Set: Summary of addressing modes and instruction groups (double operand, register and operand, single operand, program control, and operate groups).
• Console Operations: Detailed procedures for console controls, indicators, and program loading methods (Bootstrap, Absolute Binary, and Maintenance Loaders).
• Principles of Operation: Explanations of microprogramming, pipelining, virtual machine concepts, memory management, and interrupt handling.
• Logic Description: Deep dive into the hardware modules (DAP, GRA, IRC, PDR, RAC, TMC, UBC, TIG) that make up the KB11-A processor, including detailed module-by-module logic schematics, timing diagrams, and signal flow analysis.
• Maintenance: Overview of diagnostic test procedures and failure analysis.