Proposed PDP-11 Re-organization

This interoffice memorandum, dated March 4, 1969, outlines the proposed hardware and architectural structure for the PDP-11 computer. It details the machine organization, including the eight hardware registers (Accumulator, Program Counter, Priority/condition codes, Stack pointer, and four Index Registers). The document also defines the addressing modes (Immediate, Relative to P, Page Zero, and Indexed) and provides a categorized list of instructions (Memory Reference, Operate group, Add to register, External transfer, Transfer to/from register, Push/Pop group, and Conditional Jump).