EnABLE Controller

This document provides a comprehensive technical overview and installation guide for the EnABLE memory management controller, designed to extend the direct memory addressing capabilities of PDP-11 systems from 256K bytes to 4M bytes. Key topics covered include:

• Features and Specifications: Electrical requirements, timing, and physical configuration instructions for the controller, 8K cache board, and memory adapter.
• System Configuration: Detailed guidelines for board placement within the Unibus backplane and necessary cabling for 22-bit memory expansion.
• Programming Information: Exhaustive details on register programming, including Page Address Registers (PARs), I/O Map registers, System Registers (SR3, SR4), and Error Address Registers, supported by comprehensive address mapping tables.
• Diagnostics: Information on switch operations and LED indicators for troubleshooting and system configuration.